The invention relates to semiconductor manufacturing technology, and more particularly to the improvement of production throughput in semiconductor device assembly processes.
Semiconductor wafers are separated in semiconductor chips, and the chips are then assembled by a variety of techniques to form semiconductor devices. During assembly, the chips have to be placed on a carrier and aligned. The assembly cost strongly depends on the required chip alignment precision, the assembly speed, the assembly technique and other factors. Generally, sequential one-chip assembly and alignment processes are slower and more expensive than parallel multi-chip assembly and alignment techniques.
For these and other reasons, there is a need for the present invention.